Bibliography of material on Decimal Arithmetic [Index]

Decimal Arithmetic: Conversions

think 10

Architecture and software support in IBM S/390 Parallel Enterprise Servers for IEEE Floating-Point arithmetic, Paul H. Abbott et al, IBM Journal of Research and Development, Vol. 43 #5/6, pp723–760, IBM, September/November 1999.
Abstract: IEEE Binary Floating-Point is an industry-standard architecture. The IBM System/360 hexadecimal floating-point architecture predates the IEEE standard and has been carried forward through the System/370 to current System/390 processors. The growing importance of industry standards and floating-point combined to produce a need for IEEE Floating-Point on System/390. At the same time, customer investment in IBM floating-point had to be preserved. This paper describes the architecture, hardware, and software efforts that combined to produce a conforming implementation of IEEE Floating-Point on System/390 while retaining compatibility with the original IBM architecture.
Binary-to-Decimal Conversion Based on the Divisibility of 28-1 [255] by 5, B. Arazi and D. Naccache, Electronic Letters, Vol. 28 #3, pp2151–2152, IEE, November 1992.
Abstract: The Letter treats the case of converting a binary value, represented in the form of n bytes, into a decimal value, represented in the form of m BCD characters. The conversion, which is suitable for one-byte and two-byte processors, is based on the following observations: (a) 5 is a divisor of 28-1 and 216-1. (b) Modular binary arithmetic over 2r-1 is easily performed. (c) Binary division by 2r-1, in the case where the remainder is known to be zero, is easily performed. (d) All the prime factors of 28-1 and 216-1 are of the form 2r+1.
Accurate Arithmetic Results for Decimal Data on Non-Decimal Computers, Winfried Auzinger and H. J. Stetter, Computing, 35, pp141–151, 1985.
Abstract: Recently, techniques have been devised and implemented which permit the computation of smallest enclosing machine number interval for the exact results of a good number of highly composite operations. These exact results refer, however, to the data as they are represented in the computer. This note shows how the conversion of decimal data into non-decimal representations may be joined with the mathematical operation on the data into one high-accuracy algorithm. Such an algorithm is explicitly presented for the solution of systems of linear equations.
Printing Floating-Point Numbers Quickly and Accurately, Robert G. Burger and R. Kent Dybvig, Proceedings of the ACM SIGPLAN '96 conference on Programming language design and implementation, pp108–116, ACM Press, 1996.
Abstract: This paper presents a fast and accurate algorithm for printing floating-point numbers in both free- and fixed-format modes. In free-format mode, the algorithm generates the shortest, correctly rounded output string that converts to the same number when read back in, accommodating whatever rounding mode the reader uses. In fixed-format mode, the algorithm generates a correctly rounded output string using special # marks to denote insignificant trailing digits. For both modes, the algorithm employs a fast estimator to scale floating-point numbers efficiently.
How to read floating point numbers accurately, William D. Clinger, Proceedings of the ACM SIGPLAN '90 Conference on Programming Language Design and Implementation, pp92–101, ACM Press, June 1990.
Abstract: Consider the problem of converting decimal scientific notation for a number into the best binary floating point approximation to that number, for some fixed precision. This problem cannot be solved using arithmetic of any fixed precision. Hence the IEEE Standard for Binary Floating-Point Arithmetic does not require the result of such a conversion to be the best approximation.
    This paper presents an efficient algorithm that always finds the best approximation. The algorithm uses a few extra bits of precision to compute an IEEE-conforming approximation while testing an intermediate result to determine whether the approximation could be other than the best. If the approximation might not be the best, then the best approximation is determined by a few simple operations on multiple-precision integers, where the precision is determined by the input. When using 64 bits of precision to compute IEEE double precision results, the algorithm avoids higher-precision arithmetic over 99% of the time.
    The input problem considered by this paper is the inverse of an output problem considered by Steele and White: Given a binary floating point number, print a correctly rounded decimal representation of it using the smallest number of digits that will allow the number to be read without loss of accuracy. The Steele and White algorithm assumes that the input problem is solved; an imperfect solution to the input problem, as allowed by the IEEE standard and ubiquitous in current practice, defeats the purpose of their algorithm.
A Software Implementation of the IEEE 754R Decimal Floating-Point Arithmetic Using the Binary Encoding Format, Marius Cornea, Cristina Anderson, John Harrison, Ping Tak Peter Tang, Eric Schneider, and Charles Tsen, Proceedings of the 18th IEEE Symposium on Computer Arithmetic, ISBN 0-7695-2854-6, ISBN 978-0-7695-2854-0, pp29–37, IEEE, June 2007.
Abstract: The IEEE Standard 754-1985 for Binary Floating-Point Arithmetic was revised, and an important addition is the definition of decimal floating-point arithmetic. This is intended mainly to provide a robust, reliable framework for financial applications that are often subject to legal requirements concerning rounding and precision of the results, because the binary floating-point arithmetic may introduce small but unacceptable errors. Using binary floating-point calculations to emulate decimal calculations in order to correct this issue has led to the existence of numerous proprietary software packages, each with its own characteristics and capabilities. IEEE 754R decimal arithmetic should unify the ways decimal floating-point calculations are carried out on various platforms. New algorithms and properties are presented in this paper which are used in a software implementation of the IEEE 754R decimal floatingpoint arithmetic, with emphasis on using binary operations efficiently. The focus is on rounding techniques for decimal values stored in binary format, but algorithms for the more important or interesting operations of addition, multiplication, division, and conversions between binary and decimal floating-point formats are also outlined. Performance results are included for a wider range of operations, showing promise that our approach is viable for applications that require decimal floating-point calculations.
BIDEC – A Binary-to-Decimal or Decimal-to-Binary Converter, J. F. Couleur, IRE Transactions on Electronic Computers, Vol. EC-7, pp313–316, IRE, 1958.
Abstract: Simple, high-speed devices to convert binary, binary coded octal, or Gray code numbers to binary coded decimal numbers or vice versa is described. Circuitry required is four shift register stages per decimal digit plus one 30-diode network per decimal digit. In simple form the conversion requires two operations per binary bit but is theoretically capable of working at one operation per bit.
Decimal-Binary conversions in CORDIC, D. H. Daggett, IRE Transactions on Electronic Computers, Vol. EC-8 #5, pp335–339, IRE, September 1959.
Abstract: A special-purpose, binary computer called CORDIC (COordinate Rotation DIgital Computer) contains a unique arithmetic unit composed of three shift registers, three adder-subtractors, and suitable interconnections for efficiently performing calculations involving trigonometric functions. A technique is formulated for using the CORDIC arithmetic unit to convert between angles expressed in degrees and minutes in the 8, 4, 2, 1 code and angles expressed in binary fractions of a half revolution. Decimal-to-binary conversion is accomplished through the generation of an intermediate binary code in which the variable values are +1 and 1. Each of these intermediate code variables controls the addition or subtraction of a particular binary constant in the formation of an accumulated sum which represents the angle. Examples are presented to illustrate the technique. Binary-to-decimal conversion is accomplished by applying essentially the same conversion steps in reverse order, but this feature is not discussed fully. Fundamental principles of the conversion technique, rather than details of implementation, are emphasized. The CORDIC conversion technique is sufficiently general to be applied to decimal-binary conversion problems involving other mixed radix systems and other decimal codes.
Correctly Rounded Binary-Decimal and Decimal-Binary Conversions, David M. Gay, Numerical Analysis Manuscript 90-10, 16pp, AT&T Bell Laboratories, November 1990.
Abstract: This note discusses the main issues in performing correctly rounded decimal-to-binary and binary-to-decimal conversions. It reviews recent work by Clinger and by Steele and White on these conversions and describes some efficiency enhancements. Computational experience with several kinds of arithmetic suggests that the average computational cost for correct rounding can be small for typical conversions. Source for conversion routines that support this claim is available from netlib.
27 Bits Are Not Enough for 8-Digit Accuracy, I. Bennett Goldberg, Communications of the ACM, Vol. 10 #2, pp105–106, ACM Press, February 1967.
Abstract: From the inequality 108 < 227, we are likely to conclude that we can represent 8-digit decimal floating-point numbers accurately by 27-bit [binary] floating-point numbers. However, we need 28 significant bits to represent some 8-digit numbers accurately. In general, we can show that if 10p < 2q-1, then q significant bits are always enough for p-digit decimal accuracy. Finally, we can define a compact 27-bit floating-point representation that will give 28 significant bits, for numbers of practical importance.
Binary to Decimal Conversion, L. K. Griffiths, IBM Technical Disclosure Bulletin, 06-81, pp237–238, IBM, June 1981.
Abstract: Binary to decimal conversion can be achieved by multiplying 1/10 as 51/512 x 256/255 and using the fact that 256/255 = 1 + 1/256 + 1/2562 ..., i.e., 256/255 = 257-256 rounded up.
    This method can be performed efficiently on short word computers with only adding and shifting operations, i.e., first multiplying by 51/512 and then correcting by multiplying by 256/255.
On Intermediate Precision Required for Correctly-Rounding Decimal-to-Binary Floating-Point Conversion., Michel Hack, Proceedings of RNC6 (6th conference on Real Numbers and Computers), URL:, 22pp, University of Trier, November 2004.
Abstract: The algorithms developed ten years ago in preparation for IBM’s support of IEEE Floating-Point on its mainframe S/390 processors use an overly conservative intermediate precision to guarantee correctly-rounded results across the entire exponent range. Here we study the minimal requirement for both bounded and unbounded precision on the decimal side (converting to machine precision on the binary side). An interesting new theorem on Continued Fraction expansions is offered, as well as an open problem on the growth of partial quotients for ratios of powers of two and five.
Economical Correctly Rounded Binary Decimal Conversions, Kenton Hanson, URL:, 5pp, 1997.
Abstract: Economical correctly rounded binary to decimal and decimal to binary conversions simplifies computing environments. Undue confusion and inaccuracies can occur with less precise conversions. Correct conversions can easily be guaranteed with very large precision arithmetic, but may cause performance and space penalties. Mostly correct conversions can be achieved with machine arithmetic. We demonstrate that correctly rounded conversions can be guaranteed with a minimum amount of extra precision arithmetic.
    An efficient algorithm for finding the most difficult conversions is described in detail. We then use these results to show how correct conversions can be guaranteed with a minimum of extra precision. Most normal conversions only require native machine arithmetic. Determining when extra precision is needed is straightforward.

Note: Only available as a web page.
Decimal to Binary Floating Point Number Conversion Mechanism, J. W. Havender, IBM Technical Disclosure Bulletin, 07-80, pp706–708, IBM, July 1980.
Abstract: Floating point numbers may be converted from decimal to binary using a high speed natural logarithm and exponential function calculation mechanism and a fixed point divide/multiply unit.
    The problem solved is to convert numbers expressed in a radix 10 floating point form to numbers expressed in a radix 2 floating point form.
A quantitative measure of precision, G. Hunter, The Computer Journal, Volume 18, Issue 3, pp231–233, OUP, August 1975.
Abstract: The precision zb of a real number is defined quantitatively in terms of the fractional error in the number, and the base of the arithmetic in which it is represented. The definition is an extension of the traditional rough measure of precision as the number of signification digits in the number. In binary arithmetic the integral part of zb is the number of binary digits required to store the number. Conversion of the precision from one base to another (such as binary/decimal) is discussed, and applied to consideration of the intrinsic precision of input/output routines and floating point arithmetic.
On Designs of Radix Converters using Arithmetic Decompositions, Yukihiro Iguchi, Tsutomu Sasao, and Munehiro Matsuura, Proceedings of ISMVL-2007, Oslo, Norway (CD-ROM), 8pp, IEEE, May 2007.
Abstract: In digital signal processing, radixes other than two are often used for high-speed computation. In the computation for finance, decimal numbers are used instead of binary numbers. In such cases, radix converters are necessary. This paper considers design methods for binary to q-nary converters. It introduces a new design technique based on weighted-sum (WS) functions. The method computes a WS function for each digit by an LUT cascade and a binary adder, then adds adjacent digits with q-nary adders. A 16-bit binary to decimal converter is designed to show the method.
Design Methods of Radix Converters using Arithmetic Decompositions, Yukihiro Iguchi, Tsutomu Sasao, and Munehiro Matsuura, Institute of Electronics, Information and Communication Engineers, Transactions on Information and Systems, Vol. E90-D #6, pp905–914, IEICE, June 2007.
Abstract: In arithmetic circuits for digital signal processing, radixes other than two are often used to make circuits faster. In such cases, radix converters are necessary. However, in general, radix converters tend to be complex. This paper considers design methods for p-nary to binary converters. First, it considers Look-Up Table (LUT) cascade realizations. Then, it introduces a new design technique called arithmetic decomposition by using LUTs and adders. Finally, it compares the amount of hardware and performance of radix converters implemented by FPGAs. 12-digit ternary to binary converters on Cyclone II FPGAs designed by the proposed method are faster than ones by conventional methods.
A Combinatoric Division Algorithm for Fixed-Integer Divisors, David H. Jacobsohn, IEEE Transactions on Computers, Vol. C-22 #6, pp608–610, IEEE, June 1973.
Abstract: A procedure is presented for performing a combinatoric fixed-integer division that satisfies the division algorithm in regard to both quotient and remainder. In this procedure, division is performed by multiplying the dividend by the reciprocal of the divisor. The reciprocal is, in all nontrivial cases, of necessity a repeating binary fraction, and two treatments for finding the product of an integer and repeating binary fraction are developed. Two examples of the application of the procedure are given.
Decimal Shifting for an Exact Floating Point Representation, J. D. Johannes, C. Dennis Pegden, and F. E. Petry, Computers and Electrical Engineering, Vol. 7 #3, pp149–155, Elsevier, September 1980.
Abstract: A floating point representation which permits exact conversion of decimal numbers is discussed. This requires the exponent to represent a power of ten, and thus decimal shifts of the mantissa are needed. A specialized design is analyzed for the problem of division by ten, which is needed for decimal shifting.
The child-engineering of arithmetic in ToonTalk, Ken Kahn, Proceedings of the 2004 conference on Interaction Design and Children, ISBN 1-58113-791-5, pp141–142, ACM Press, 2004.
Abstract: Providing a child-appropriate interface to an arithmetic package with large numbers and exact fractions is surprisingly challenging. We discuss solutions to problems ranging from how to present fractions such as 1/3 to how to deal with numbers with tens of thousands of digits. As with other objects in ToonTalk®, we strive to make the enhanced numbers work in a concrete and playful manner.
Another method of converting from hexadecimal to decimal, M. V. Kailas, Communications of the ACM, Vol. 13 #3, 193pp, ACM Press, March 1970.
Abstract: There is a simple paper-and-pencil method of converting a hexadecimal number N to decimal.
Reversible Implementation of Densely-Packed-Decimal Converter to and from Binary-Coded-Decimal Format Using in IEEE-754R, A. Kaivani, A. Zaker Alhosseini, S. Gorgin, and M. Fazlali, 9th International Conference on Information Technology (ICIT'06), pp273–276, IEEE, December 2006.
Abstract: The Binary Coded Decimal (BCD) encoding has always dominated the decimal arithmetic algorithms and their hardware implementation. Due to importance of decimal arithmetic, the decimal format defined in lEEE 754 floating point standard has been revisited. It uses Densely Packed Decimal (DPD) encoding to store significand part of a decimal floating point number. Furthermore in recent years reversible logic has attracted the attention of engineers for designing low power CMOS circuits, as it is not possible to realize quantum compufing withouf reversible logic implementation. This paper derives the reversible implementation of DPD converter to and from conventional BCD format using in IEEE 754R.
Number Base Conversion in a Significant Digit Arithmetic, Herbert Kanner, Journal of the ACM, Vol. 12 #2, ISSN 0004-5411, pp242–246, ACM Press, April 1965.
Abstract: An algorithm is presented for the conversion in either direction between binary and decimal floating-point representations, retaining proper significance through the conversion in an unnormalized significant digit arithmetic.
On the Conversion Between Number Systems, Houssain Kettani, IEEE Transactions on Circuits and Systems, Vol. 53 #11, ISSN 1057-7130, pp1255–1258, IEEE, November 2006.
Abstract: This brief revisits the problem of conversion between number systems and asks the following question: given a nonnegative decimal number d, what is the value of the digit at position j in the corresponding base b number? Thus, we do not require the knowledge of other digits except the one we are interested in. Accordingly, we present a conversion function that relates each digit in a base b system to the decimal value that is equal to the base b number in question. We also show some applications of this new algorithm in the areas of parallel computing and cryptography.
The Art of Computer Programming, Vol 2, Donald E. Knuth, ISBN 0-201-89684-2, 762pp, Addison Wesley Longman, 1998.
Abstract: The chief purpose of this chapter [4] is to make a careful study of the four basic processes of arithmetic: addition, subtraction, multiplication, and division. Many people see arithmetic as a trivial thing that children learn and computers do, but we will see that arithmetic is a fascinating topic with many interesting facets. ...
Note: Third edition. See especially sections 4.1 through 4.4.
Hardware Conversion of Decimal and Binary Numbers, G. T. Lake, Communications of the ACM, Vol.5 #9, pp468–469, ACM Press, September 1962.
On a Wired-In Binary-to-Decimal Conversion Scheme, W. C. Lynch, Communications of the ACM, Vol. 5 #3, pp159–159, ACM Press, March 1962.
Multiple precision floating-point conversion from decimal-to-binary and vice versa, O. G. Mancino, Communications of the ACM, Vol. 9 #5, pp347–348, ACM Press, May 1966.
Abstract: Decimal-to-binary and binary-to-decimal floating-point conversion is often performed by using a table of the powers 10i (i a positive integer) for converting from base 10 to base 2, and by using a table of the coefficients of a polynomial approximation of 10x (0 ≤ x < 1) for converting from base 2 to base 10. These tables occupy a large storage region in the case of a nonsingle precision conversion. This paper shows that a single small table suffices for a floating-point conversion from decimal to binary, and vice versa, in any useful precision.
Superoptimizer: A Look at the Smallest Program, Henry Massalin, ACM Sigplan Notices, Vol. 22 #10 (Proceedings of the Second International Conference on Architectual support for Programming Languages and Operating Systems), pp122–126, ACM, also IEEE Computer Society Press #87CH2440-6, October 1987.
Abstract: Given an instruction set, the superoptimizer finds the shortest program to compute a function. Startling programs have been generated, many of them engaging in convoluted bit-fiddling bearing little resemblance to the source programs which defined the functions. The key idea in the superoptimizer is a probabilistic test that makes exhaustive searches practical for programs of useful size. The search space is defined by the processor’s instruction set, which may include the whole set, but it is typically restricted to a subset. By constraining the instructions and observing the effect on the output program, one can gain insight into the design of instruction sets. In addition, superoptimized programs may be used by peephole optimizers to improve the quality of generated code, or by assembly language programmers to improve manually written code.
Note: Also in: ACM SIGOPS, Operating Systems Review, Vol. 21 # 4.
A Formalization of Floating-Point Numeric Base Conversion, David W. Matula, IEEE Transactions on Computers, Vol. C-19 #8, pp681–692, IEEE, August 1970.
Abstract: The process of converting arbitrary real numbers into a floating-point format is formalized as a mapping of the reals into a specified subset of real numbers. The structure of this subset, the set of n significant digit base b floating-point numbers, is analyzed and properties of conversion mappings are determined. For a restricted conversion mapping of the n significant digit base b numbers to the m significant-digit base d numbers, the one-to-one, onto, and order-preserving properties of the mapping are summarized. Multiple conversions consisting of a composition of individual conversion mappings are investigated and some results of the invariant points of such compound conversions are presented. The hardware and software implications of these results with regard to establishing goals and standards for floating-point formats and conversion procedures are considered.
In-and-out conversions, David Matula, Communications of the ACM, Vol. 11 #1, pp47–60, ACM Press, January 1968.
Abstract: By an in-and-out conversion we mean that a floating-point number in one base is converted into a floating-point number in another base and then converted back to a floating-point number in the original base. For all combinations of rounding and truncation conversions the question is considered of how many significant digits are needed in the intermediate base to allow such in-and-out conversions to return the original number (when possible), or at least to cause a difference of no more than a unit in the least significant digit.
Methods and Programs for Mathematical Functions, Stephen L. Moshier, 415pp, Prentice-Hall, Inc., Englewood Cliffs, New Jersey 07632, USA, 1989.
Abstract: This book provides a working collection of mathematical software for computing various elementary and higher functions. It also supplies tutorial information of a practical nature; the purpose of this is to assist in constructing numerical programs for the reader’s special applications.
    Though some of the main analytical techniques for deriving functional expansions are described, the emphasis is on computing; so there has been no attempt to incorporate or supplant the many books on functional and numerical analysis that are available. ...

Note: Program source codes are available at
Supporting packed decimal in Ada, David A. Rosenfeld, Proceedings of the conference on TRI-Ada '91, ISBN 0-89791-445-7, pp187–190, ACM Press, 1991.
Abstract: One of the principal barriers to Ada in the Information Systems (IS) marketplace is that Ada compilers do not support decimal arithmetic and a packed decimal representation for numbers. An Ada apologist could argue that Ada as a language does support these featurtx, but such arguments do little to help a COBOL programmer, accustomed to manipulating decimal quantities in a straightforward way. Our project, under contract to the Army, is addressing the problem directly, by implementing packed decimal numbers in its MVS Ada Compiler. T his paper will discuss the possible approaches to the problem, and explain the approach selected, comparing it briefly with other solutions...
Radix Converters: Complexity and Implementation by LUT Cascades, Tsutomu Sasao, 35th International Symposium on Multiple-Valued Logic (ISMVL'05), pp256–263, IEEE, May 2005.
Abstract: In digital signal processing, we often use higher radix system to achieve high-speed computation. In such cases, we require radix converters. This paper considers the design of LUT cascades that convert ��-nary numbers to -nary numbers. In particular, we derive several upper bounds on the column multiplicities of decomposition charts that represent radix converters. From these, we can estimate the size of LUT cascades to realize radix converters. These results are useful to design compact radix converters, since these bounds show strategies to partition the outputs into groups.
High Speed Binary to Decimal Conversion, M. S. Schmookler, IEEE Transactions on Computers, Vol. C-17, pp506–508, IEEE, 1968.
Abstract: This note describes several methods of performing fast, efficient, binary-to-decimal conversion. With a modest amount of circuitry, an order of magnitude speed improvement can is obtained. This achievement offers a unique advantage to general-purpose computers requiring special hardware to translate between binary and decimal numbering systems.
Two Methods for Fast Integer Binary-BCD Conversion, F. A. Schreiber and R. Stefanelli, Proc. 4th Symposium on Computer Arithmetic, pp200–207, IEEE Press, October 1978.
Abstract: Two methods for performing binary-BCD conversion of positive integers are discussed. The principle which underlies both methods is the repeated division by five and then by two, obtained the first by means of subtractions performed from left to right, the second by shifting bits before next subtraction.
    It is shown that these methods work in a time which is linear with the length in bit of the number to be converted,
    A ROM solution is proposed and its complexity is compared with that of other methods.
Serial Binary Division by Ten, R. L. Sites, IEEE Transactions on Computers, Vol. 23 #12, ISSN 0018-9340, pp1299–1301, IEEE, December 1974.
Abstract: A technique is presented for dividing a positive binary integer by ten, in which the bits of the input are presented serially, low-order bit first. A complete division by ten is performed in two word times (comparable to the time needed for two serial additions). The technique can be useful in serial conversions from binary to decimal, or in scaling binary numbers by powers of 10.
How to Print Floating-Point Numbers Accurately, Guy. L. Steele Jr. and Jon. L. White, Proceedings of the ACM SIGPLAN '90 Conference on Programming Language Design and Implementation, pp112–126, ACM Press, June 1990.
Abstract: We present algorithms for accurately converting [binary] floating-point numbers to decimal representation. The key idea is to carry along with the computation an explicit representation of the required rounding accuracy.
    We begin with the simpler problem of converting fixed-point fractions. A modification of the well-known algorithm for radix-conversion of fixed-point fractions by multiplication explicitly determines when to terminate the conversion process; a variable number of digits are produced. ...
How to Print Floating-Point Numbers Accurately (Retrospective), Guy. L. Steele Jr. and Jon. L. White, 20 Years of the ACM/SIGPLAN Conference on Programming Language Design and Implementation (1979-1999): A Selection, 2003, 3pp, ACM Press, 2003.
Abstract: Our PLDI paper was almost 20 years in the making. How should the result of dividing 1.0 by 10.0 be printed? In 1970, one usually got “0.0999999” or “0.099999994”; why not “0.1”? ...
Binary conversion, with fixed decimal precision, of a decimal fraction, Donald Taranto, Communications of the ACM, Vol. 2 #7, pp27–27, ACM Press, July 1959.
Abstract: Given a decimal fraction f find a binary approximation fb to f, with a given decimal precision h.
Functions to Support Input and Output of Intervals, M. H., van Emden, B. Moa, and S. C. Somosan, Report DCS-311-IR, 16pp, University of Victoria, Canada, February 2007.
Abstract: Interval arithmetic is hardly feasible without directed rounding as provided, for example, by the IEEE floating-point standard. Equally essential for interval methods is directed rounding for conversion between the external decimal and internal binary numerals. This is not provided by the standard I/O libraries. Conversion algorithms exist that guarantee identity upon conversion followed by its inverse. Although it may be possible to adapt these algorithms for use in decimal interval I/O, we argue that outward rounding in radix conversion is computationally a simpler problem than guaranteeing identity. Hence it is preferable to develop decimal interval I/O ab initio, which is what we do in this paper.
Division by 10, R. A. Vowels, Australian Computer Journal, Vol. 24 #3, pp81–85, ACS, August 1992.
Abstract: Division of a binary integer and a binary floating-point mantissa by 10 can be performed with shifts and adds, yielding a significant improvement in hardware execution time, and in software execution time if no hardware divide instruction is available. Several algorithms are given, appropriate to specific machine word sizes, hardware and hardware instructions available, and depending on whether a remainder is required.
    The integer division algorithms presented here contain a new strategy that produces the correct quotient directly, without the need for the supplementary correction required of previously published algorithms. The algorithms are competitive in time with binary coded decimal (BCD) divide by 10.
    Both the integer and floating-point algorithms are an order of magnitude faster than conventional division.

The 42 references listed on this page are selected from the bibliography on Decimal Arithmetic collected by Mike Cowlishaw. Please see the index page for more details and other categories.

Last updated: 10 Mar 2011
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